Simulation Results

/* variant: hello_user_pstr */

/* author: Степанов Арсений - P3318 - 368849 */

/* comment */

https://github.com/Armemius/ProcessorArchitectureExperiments/tree/main/src/acc32

/* assembler_code */

assembler_code =

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    .data

buf:             .byte  '________________________________'
zone:            .word  0
buf_size:        .word  32

message:         .byte  'What is your name?\n\0'
message_size:    .word  19

greeting:        .byte  'Hello, \0'
greeting_size:   .word  7

i:               .word  0
j:               .word  0
ptr:             .word  0
ptr2:            .word  0
input_addr:      .word  0x80
output_addr:     .word  0x84

const_1:         .word  1
const_FF:        .word  0x000000FF
const_endline:   .word  0x5f5f5f0a         ; '\n___'
const_mask:      .word  0x5f5f5f00         ; '\0___'
const_ex_mark:   .word  0x5f5f5f21         ; '!___'
const_FFFFFF00:  .word  0xFFFFFF00
const_failure:   .word  0xCCCCCCCC

    .text
    .org         0x120
_start:
    load_imm     message
    store        ptr                         ; ptr <- message

    load         message_size
    store        i                           ; i <- *message_size

loop:
    beqz         loop_end                    ; while (i != 0) {

    load_ind     ptr
    and          const_FF
    store_ind    output_addr                 ;     *output_addr <- *ptr & const_FF

    load         ptr
    add          const_1
    store        ptr                         ;     ptr <- ptr + const_1

    load         i
    sub          const_1
    store        i                           ;     i <- i - const_1

    jmp          loop                        ; }


loop_end:

    load_imm     buf
    add          const_1
    store        ptr                         ; ptr <- buf + 1

    load         const_1
    store        i                           ; i <- const_1

    load_imm     greeting
    store        ptr2                        ; ptr2 <- greeting

    load         greeting_size
    store        j                           ; j <- greeting_sizexrRw

read_pstr_prefix:
    beqz         read_pstr

    load_ind     ptr2
    and          const_FF
    or           const_mask
    store_ind    ptr                         ;     *ptr <- *ptr2 & const_FF | const_mask

    load         ptr
    add          const_1
    store        ptr                         ;     ptr <- ptr + const_1

    load         ptr2
    add          const_1
    store        ptr2                        ;     ptr2 <- ptr2 + const_1

    load         i
    add          const_1
    store        i                           ;     i <- i + const_1

    load         j
    sub          const_1
    store        j                           ;     j <- j - const_1

    jmp          read_pstr_prefix            ; }


read_pstr:

    load_ind     input_addr                  ; while(true) {
    and          const_FF
    or           const_mask
    store_ind    ptr                         ;     *ptr <- *input_addr & const_FF | const_mask

    sub          const_endline
    beqz         read_pstr_end               ;     if (*ptr == '\n') break

    load         i
    add          const_1
    store        i                           ;     i <- i + const_1

    add          const_1
    sub          buf_size
    beqz         fail                        ;     if (i - 1 == buf_size) fail

    load         ptr
    add          const_1
    store        ptr                         ;     ptr <- ptr + const_1

    jmp          read_pstr                   ; }

read_pstr_end:

    load         const_ex_mark
    store_ind    ptr                         ; *ptr <- const_ex_mark

    load         buf
    and          const_FFFFFF00
    or           i
    store        buf                         ; *buf <- (*buf & const_FFFFFF00) | i


    load_imm     buf
    add          const_1
    store        ptr                         ; ptr <- buf + 1

    load         buf
    and          const_FF
    store        i                           ; i <- *buf & const_FF

write_pstr:

    beqz         end                         ; while (i != 0) {

    load_ind     ptr
    and          const_FF
    store_ind    output_addr                 ;     *output_addr <- *ptr & const_FF

    load         ptr
    add          const_1
    store        ptr                         ;     ptr <- ptr + const_1

    load         i
    sub          const_1
    store        i                           ;     i <- i - const_1

    jmp          write_pstr                  ; }

end:
    halt

fail:
    load         const_failure
    store_ind    output_addr                 ; *output_addr <- const_failure
    halt

/* simulation_config */

simulation_config =

/* simulation_result */

$ date
2025-11-13 15:43:11.607064664 UTC
$ wrench --version
0.0.3.1 (af988d0) Wed Sep 10 19:03:23 2025 +0200
wrench --isa acc32 /data/87233c01-d629-460e-a8a4-cae115dbbcf9/source.s -c /data/87233c01-d629-460e-a8a4-cae115dbbcf9/config.yaml
ExitSuccess

simulation_log =

/* testcase_result */

/app/variants/hello_user_pstr/1.yaml: ExitSuccess
/app/variants/hello_user_pstr/2.yaml: ExitSuccess
/app/variants/hello_user_pstr/3.yaml: ExitSuccess
/app/variants/hello_user_pstr/4.yaml: ExitSuccess
/app/variants/hello_user_pstr/5.yaml: ExitSuccess

failed_test_case =

dump =

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0:	buf
32:	zone
36:	buf_size
40:	message
60:	message_size
64:	greeting
72:	greeting_size
76:	i
80:	j
84:	ptr
88:	ptr2
92:	input_addr
96:	output_addr
100:	const_1
104:	const_FF
108:	const_endline
112:	const_mask
116:	const_ex_mark
120:	const_FFFFFF00
124:	const_failure
288:	_start
302:	loop
343:	loop_end
374:	read_pstr_prefix
436:	read_pstr
494:	read_pstr_end
534:	write_pstr
575:	end
576:	fail
---
mem[0..31]: 	5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f 5f	@"buf"
mem[32..35]: 	00 00 00 00	@"zone"
mem[36..39]: 	20 00 00 00	@"buf_size"
mem[40..59]: 	57 68 61 74 20 69 73 20 79 6f 75 72 20 6e 61 6d 65 3f 0a 00	@"message"
mem[60..63]: 	13 00 00 00	@"message_size"
mem[64..71]: 	48 65 6c 6c 6f 2c 20 00	@"greeting"
mem[72..75]: 	07 00 00 00	@"greeting_size"
mem[76..79]: 	00 00 00 00	@"i"
mem[80..83]: 	00 00 00 00	@"j"
mem[84..87]: 	00 00 00 00	@"ptr"
mem[88..91]: 	00 00 00 00	@"ptr2"
mem[92..95]: 	80 00 00 00	@"input_addr"
mem[96..99]: 	84 00 00 00	@"output_addr"
mem[100..103]: 	01 00 00 00	@"const_1"
mem[104..107]: 	ff 00 00 00	@"const_FF"
mem[108..111]: 	0a 5f 5f 5f	@"const_endline"
mem[112..115]: 	00 5f 5f 5f	@"const_mask"
mem[116..119]: 	21 5f 5f 5f	@"const_ex_mark"
mem[120..123]: 	00 ff ff ff	@"const_FFFFFF00"
mem[124..287]: 	cc cc cc cc 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00	@"const_failure"
mem[288..292]: 	LoadImm 40 	@_start
mem[293..295]: 	Store (-209)
mem[296..298]: 	Load (-236)
mem[299..301]: 	Store (-223)
mem[302..306]: 	Beqz 343 	@loop
mem[307..311]: 	LoadInd 84
mem[312..314]: 	And 104
mem[315..319]: 	StoreInd 96
mem[320..322]: 	Load (-236)
mem[323..325]: 	Add 100
mem[326..328]: 	Store (-242)
mem[329..331]: 	Load (-253)
mem[332..334]: 	Sub 100
mem[335..337]: 	Store (-259)
mem[338..342]: 	Jmp 302
mem[343..347]: 	LoadImm 0 	@loop_end
mem[348..350]: 	Add 100
mem[351..353]: 	Store (-267)
mem[354..356]: 	Load (-254)
mem[357..359]: 	Store (-281)
mem[360..364]: 	LoadImm 64
mem[365..367]: 	Store (-277)
mem[368..370]: 	Load (-296)
mem[371..373]: 	Store (-291)
mem[374..378]: 	Beqz 436 	@read_pstr_prefix
mem[379..383]: 	LoadInd 88
mem[384..386]: 	And 104
mem[387..389]: 	Or 112
mem[390..394]: 	StoreInd 84
mem[395..397]: 	Load (-311)
mem[398..400]: 	Add 100
mem[401..403]: 	Store (-317)
mem[404..406]: 	Load (-316)
mem[407..409]: 	Add 100
mem[410..412]: 	Store (-322)
mem[413..415]: 	Load (-337)
mem[416..418]: 	Add 100
mem[419..421]: 	Store (-343)
mem[422..424]: 	Load (-342)
mem[425..427]: 	Sub 100
mem[428..430]: 	Store (-348)
mem[431..435]: 	Jmp 374
mem[436..440]: 	LoadInd 92 	@read_pstr
mem[441..443]: 	And 104
mem[444..446]: 	Or 112
mem[447..451]: 	StoreInd 84
mem[452..454]: 	Sub 108
mem[455..459]: 	Beqz 494
mem[460..462]: 	Load (-384)
mem[463..465]: 	Add 100
mem[466..468]: 	Store (-390)
mem[469..471]: 	Add 100
mem[472..474]: 	Sub 36
mem[475..479]: 	Beqz 576
mem[480..482]: 	Load (-396)
mem[483..485]: 	Add 100
mem[486..488]: 	Store (-402)
mem[489..493]: 	Jmp 436
mem[494..496]: 	Load (-378) 	@read_pstr_end
mem[497..501]: 	StoreInd 84
mem[502..504]: 	Load (-502)
mem[505..507]: 	And 120
mem[508..510]: 	Or 76
mem[511..513]: 	Store (-511)
mem[514..518]: 	LoadImm 0
mem[519..521]: 	Add 100
mem[522..524]: 	Store (-438)
mem[525..527]: 	Load (-525)
mem[528..530]: 	And 104
mem[531..533]: 	Store (-455)
mem[534..538]: 	Beqz 575 	@write_pstr
mem[539..543]: 	LoadInd 84
mem[544..546]: 	And 104
mem[547..551]: 	StoreInd 96
mem[552..554]: 	Load (-468)
mem[555..557]: 	Add 100
mem[558..560]: 	Store (-474)
mem[561..563]: 	Load (-485)
mem[564..566]: 	Sub 100
mem[567..569]: 	Store (-491)
mem[570..574]: 	Jmp 534
mem[575..575]: 	Halt 	@end
mem[576..578]: 	Load (-452) 	@fail
mem[579..583]: 	StoreInd 96
mem[584..584]: 	Halt
mem[585..4095]: 	( 00 )

/* comment: not found */